A-Series
frame grabbers for image acquisition
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frame grabbers
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For Quality Assurance in automation
and Process Engineering applications |
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| Two series of frame grabbers
are offered that cover different requirements.
Both series support a variety of interfaces - Camera
Link; Camera Link HS; CoaXPress; GigE Vision; LVDS and Thunderbolt
Technology and offered as internal plug-in cards or as external
devices. |
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| a) |
Frame
grabbers as image acquisition devices
(A-Series), providing additional pre-processing functions
alongside image acquisition Series A grabbers have powerful FPGA processors to integrate high-quality image pre-processing functions into the firmware without having to load into the CPU for processing. There is no image loss and minimal latency. A-Series frame grabbers are not FPGA programmable. |
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| b) | Frame
grabbers as image processing devices
(V-Series) which are programmable for individualisation Read about the V Series |
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A-series - Image acquisiton devices
A-series frame grabbers are based on the most modern processor technology,
which executes image acquisition without loading the CPU, without image
loss and with minimal latency. The A-Series frame grabbers with expanded
image recording functions come with pre-programmed and valuable functions
that can be activated via the configuration software.
The trigger/GPIO interface offers comprehensive configuration possibilities
for scan and line cameras.
The integrated preprocessing functions are designed for image improvements
- i.e., gamma values, brightness, contrast, but also median noise filtering
and shading correction; image reconstructio - i.e. , tap sorting, Bayer
CFA colour reconstruction, network packet management; and comprehensive
format support.z
With their FPGA processors and generous on-board memory extension, these
frame grabbers represent state-of-the-art technology.
Features common to all A-Series frame grabbers
• Support of Area and Line Scan cameras........
• Broad support of Third-party software interfaces........
• Versatile application and industry usage........
• Flexible and extensible model series
• Robust and industrial FPGA Technology ........
• PCIe Standard height, half length card (167.64 mm length x 111.15
mm height)
| Specifications |
microEnable 5 ironman AD8-PoCL | microEnable 5 ironman AQ8-CXP6D | microEnable 5 marathon ACL | microEnable 5 marathon ACX-QP |
PCIe
image acquisition device that allows a full bandwidth connection
of two Camera Link standardized cameras. |
PCIe
image acquisition device that allows a full bandwidth connection
of four CoaXPress standardized cameras. |
PCIe image acquisition device that allows the connection of two cameras of any Camera Link standard specification. | PCIe image acquisition device that allows the connection of up to four CoaXPress cameras with a bandwidth of 25 Gbit/s. | |
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| On-board memory |
1 GByte
DDR3-RAM |
512 MByte DDR3-RAM | 1024 MByte DDR3-RAM | |
| Standard |
Camera Link 2.0,
up to 85 MHz Pixel Clock |
CoaXPress 1.0/1.1 |
Camera Link 2.0, up to 85 MHz Pixel Clock | CoaXPress 1.0/1.1 |
| Configurations |
CL-full, CL-deca
(80bit) |
CXP-1, -2, -3,
-5, -6; up to 4 cameras |
CL: -base, -dual, -medium, -full, -deca 80bit | CXP-1, -2, -3, -5, -6; up to 4 cameras |
| I/O
module interfaces |
Trigger/GPIO-IF (Opto Trigger, TTL Trigger) | |||
| Data
bandwidth (theo., max.) |
850 MB/s |
4* 6.25 Gbit/s |
850 MB/s | 4* 6,25 Gbit/s |
| PC Bus Interface |
PCI
Express x8 (Gen 2) |
PCI Express x4 (Gen 2) | ||
| Power output |
PoCL SafePower |
Power over CXP; SafePower | PoCL SafePower | Power over CXP; SafePower |
| Other
features |
• On-board
colour reconstruction |
•
Support of fastest CoaXPress cameras • Easy-to-use configuration software • Highest performance image acquisition • Hot pluggable |
•
All formats of Camera Link standard • Support of long cable length • Onboard image preprocessing functions • Opto-decoupled signals via front I/O |
•
Support of fastest CoaXPress cameras • Easy-to-use configuration software • Highest performance image acquisition • Opto-decoupled signals via front I/O |
| Data sheets | microEnable 5 ironman AD8-PoCL | microEnable 5 ironman AQ8-CXP6D | microEnable 5 marathon ACL | microEnable 5 marathon ACX-QP |
| Specifications | microEnable 5 marathon AF2 | microEnable IV AD1-CL | microEnable IV AD1-mPoCL | microEnable IV AD1-PoCL |
| PCIe image acquisition device that allows an optical fibre connection of two cameras of Camera Link HS standard | PCIe image acquisition device that allows the connection of two Camera Link cameras | PCIe image acquisition device that allows the connection of two Camera Link or PoCL cameras by SDR / HDR connectors | PCIe image acquisition device that allows the connection of two Camera Link or PoCL cameras | |
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| On-board
memory |
512 MByte DDR3-RAM | 128 MByte DDR-RAM | ||
| Standard |
Camera Link HS | Camera Link 2.0, up to 85 MHz Pixel Clock | ||
| Configurations |
Dual CLHS F2 | CL-lite, CL-base, CL-dual base, CL-medium |
CL-base, CL-dual base, CL-medium | CL-lite, CL-base, CL-dual base, CL-medium |
| I/O module
interfaces |
Trigger/GPIO-IF (Opto Trigger, TTL Trigger) | |||
| Data bandwidth (theo., max.) |
2* 10 Gbit/s | 2* 255 MB/s | ||
| PC Bus Interface |
PCI Express x4 (Gen 2) | PCI Express x1 (Gen1) | ||
| Power output |
n/a |
PoCL SafePower | ||
| Other
features |
•
Fibre optics cable support • Multi-Camera/Single- and Single- ...Camera/Multi-Frame grabber • Opto-isolated front GPIO from 4,5 – 28V, ...TTL Outputs, RS 485 interface |
•
High industrial compliance • Broad camera support • No camera file needed • Image enhancement by On-Board Noise ...Filter |
•
PoCL SafePower • Broad camera support • No camera file needed • Image enhancement by On-Board Noise ...Filter |
• PoCL SafePower |
| Data sheets | microEnable 5 marathon AF2 | microEnable IV AD1-CL | microEnable IV AD1-mPoCL | microEnable IV AD1-PoCL |
| Specifications |
microEnable IV AD4-CL | microEnable IV AD4-CL (LVTTL) | microEnable IV AD4-LVDS | microEnable IV AD4-PoCL |
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| PCIe image acquisition device that allows the full bandwidth connection of two Camera Link cameras | PCIe image acquisition device that allows full bandwidth connection of two Camera Link cameras and a direct signalling | PCIe image acquisition device that allows the full bandwidth connection of two LVDS cameras | PCIe image acquisition device that allows the full bandwidth connection of two Camera Link or PoCL cameras. | |
| On-board
memory |
256 MByte DDR-RAM | |||
| Standard |
Camera
Link 2.0, up to 85 MHz Pixel Clock |
LVDS | Camera Link 2.0, up to 85 MHz Pixel Clock | |
| Configurations |
CL-base, -dual base, -medium, -full, -deca (80bit) including non-Standard formats | Dual-LVDS, 8bit |
CL-base, -dual, -medium, -full, -deca (80bit) | |
| I/O module
interfaces |
Trigger/GPIO-IF (Opto Trigger, TTL Trigger) | |||
| Data bandwidth (theo., max.) |
850 MB/s | |||
| PC Bus Interface |
PCI Express x4 (Gen1) | |||
| Power output |
n/a | PoCL SafePower | ||
| Other
features |
•
All formats of Camera Link standard • BayerHQe Quality (5x5) • Image Enhancement by On-Board Noise ...Filter • Shading Correction (Offset and Gain) |
•
All formats of Camera Link standard • BayerHQe Quality (5x5) • Image Enhancement by On-Board Noise ...Filter • Shading Correction (Offset and Gain) |
•
High LVDS compliance combined with ...modern
technology • PCIe technology • Modern software environment • Professional Machine Vision SDK support • Long cable lengths |
•
All formats of Camera Link standard • BayerHQe Quality (5x5) • Image Enhancement by On-Board Noise ...Filter • Shading Correction (Offset and Gain) • PoCL SafePower |
| Data sheets | microEnable IV AD4-CL | microEnable IV AD4-CL (LVTTL) | microEnable IV AD4-LVDS | microEnable IV AD4-PoCL |
| Specifications |
microEnable IV AD4-PoCL (LVTTL) | microEnable IV AQ4-GE | microEnable IV AQ4-GPoE | microEnable IV AS1-PoCL |
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| PCIe image acquisition device that allows the full bandwidth connection of two Camera Link or PoCL cameras and a direct signalling | PCIe image acquisition device that allows the full bandwidth connection of two GigE Vision cameras | PCIe image acquisition device that allows the full bandwidth connection of two GigE Vision or PoGEV cameras | PCIe image acquisition device that allows a connection of one Camera Link or PoCL camera | |
| On-board
memory |
256 MByte DDR-RAM | 128 MByte DDR-RAM | ||
| Standard |
Camera Link 2.0, up to 85 MHz Pixel Clock | GigE Vision | Camera Link 2.0, up to 85 MHz Pixel Clock | |
| Configurations |
CL-base, -dual , -medium, -full, -deca (80bit) including non-Standard formats | Single Link, LAG (specific protocol) | CL-lite, CL-base | |
| I/O module
interfaces |
Trigger/GPIO-IF (Opto Trigger, TTL Trigger) | |||
| Data bandwidth (theo., max.) |
850 MB/s |
4*125 MB/s | 1* 255 MB/s | |
| PC Bus Interface |
PCI
Express x4 (Gen1) |
PCI Express x1 (Gen1) | ||
| Power output |
PoCL SafePower |
n/a | Power over Ethernet, PC power separate | PoCL SafePower |
| Other
features |
•
All formats of Camera Link standard • BayerHQe Quality (5x5) • Image Enhancement by On-Board Noise ...Filter • Shading Correction (Offset and Gain) |
•
Lowest CPU load even for multi-devices • Stable multi-camera support • Ease-of-use configuration software • Professional Machine Vision SDK support • Power over GigabitEthernet • Up to 100m cable length |
•
Lowest CPU load even for multi-devices • Stable multi-camera support • Ease-of-use configuration software • Professional Machine Vision SDK support • Power over GigabitEthernet • Up to 100m cable length |
•
Single channel, Base format frame grabber • PoCL SafePower • Broad camera support • No camera file needed • Image Enhancement by On-Board Noise ...Filter |
| Data sheets | microEnable IV AD4-PoCL (LVTTL) | microEnable IV AQ4-GE | microEnable IV AQ4-GPoE | microEnable IV AS1-PoCL |
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info@adeptturnkey.com.au
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