LVDS/RS422 Frame Grabbers
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Model
On-board memory
Standard
Configuration
I/O module interface
Power output
Silicon Software - Non-programmable frame grabbers for area and line scan cameras    
microEnable IV AD4-LVDS
 256 MByte LVDS Dual-LVDS Trigger/GPIO-IF (Opto Trigger, TTL Trigger) n/a


Model
Input signal
Camera output
Imagenation      
PDX
 RS422 (up to 30 MHz per channel); EIA-644 (LVDS) (up to 40 MHz per channel) • Single channel: up to 32 bits/pixel & pixel rates to 40M pixels/sec for EIA-644 (LVDS) signals; • Dual channel: up to 16 bits/pixel and up to 80M pixel/sec rates;
• Four channel camera at 8 bits/pixel and up to 160M pixels/sec rates


Model
Pixel clock
Length
Host Bus
Camera interface
Number of cameras
Teledyne DALSA      
X64-LVDS
 Up to 75 MHz Half PCI-64/PCI-X 66 LVDS / RS422  
Xcelera-LVDS PX4 Up to 75 MHz Half PCle x 4 LVDS / RS422
1
Xtium-CLHS PX4 Up to 85 MHz Half PCle x 4 • CLHS 1 to 7 lane configurations
• Single CX4 cable input from camera
• Support for CLHS acquisition trigger modes 1 through 4		  
Xtium-CLHS PX8 Up to 85 MHz Half PCle x 8 • CLHS 1 to 7 lane configurations
• Single CX4 cable input from camera
• Support for CLHS acquisition trigger modes 1 through 4		  

 

If you are uncertain as to which frame grabbers to use, please Contact one of our Vision Engineers today
and receive specialist advice on the optimal frame grabber board for your application