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CMOS Sensors – where they came from; where they are now
CMOS imaging sensors have evolved to become a viable competitor to CCD technology
Innovations and improvements overcome traditional
issues
Improvements in the design of CMOS sensors have led to better image quality
and opened up new possibilities for much faster inspection systems with
the desired image quality and while acknowledging the trade-offs necessary
to balance the varying attributes of the image sensor and camera with
the needs of the machine vision system, the progress made in CMOS development
has made it the preferred technology for high-speed inspections.
Although trade-offs regarding imaging performance, camera functionality
and feasibility issues still need to be weighed up, CMOS imaging technology
has seen significant advancements and has increased in usage over competing
CCD technology by original equipment manufacturers in the machine vision
industry and has made it the preferred technology for high-speed imaging.
Background and
advancements
Historically, image quality thresholds demanded CCD technology for shuttered
imaging but the first generation of CMOS sensors provided only rolling
shutter functionality, precluding their use in many shuttered applications
even though the CMOS offered higher speed, lower power and lower cost.
A CMOS global shutter was eventually developed solving the original r
shortfall and allowing CMOS to be relevant to more users.
Recent advances in this technology have vastly reduced the noise and have
improved signal-to-noise ratio levels, making CMOS technology surpass
what is possible in the CCD ILT, and which, previously, was a major performance
hurdle. In high-speed machine vision applications, CMOS meets or exceeds
CCD ILT technology in functionality, performance, and cost.
Similarly, the latest generations of CMOS technology have diminished the
trade-off between resolution and speed by using very high data throughput,
made possible by very fast, high bandwidth analog-to- digital converters.
The speed of these devices has challenged the boundaries of available
data transmission standards such as CameraLink and has been the primary
driving force behind the new high bandwidth CameraLink HS standard.
Addressing other trade-offs
Having resolved the trade-off between resolution and speed, another hurdle
overcome was the narrowing of the gap between speed and image quality,
an issue which has dogged high-speed applications in the past.
Use of features such as Pinned Photodiode Technology and optimized implantation
techniques, reduce dark current and the number of “hot pixels”
as well as the noise and lag in an image which has improved pixel signal-to-noise
ratio. A lower noise floor means that new imagers can be used with less
illumination and at faster frame rates while still achieving the same
image SNR as older, slower, noisier designs.
Peripheral benefits
The benefits of the new CMOS imaging technology are not only confined
to the sensor. Advances in CMOS camera design techniques have also offered
new possibilities in terms of imaging performance, where, for example,
real time embedded processing in the camera compensates for non-idealities
in the sensor. This embedded processing in the camera also simplifies
the vision system by performing processing that was traditionally done
in a frame grabber. Windowing capability and ability to change camera
aspect ratio are other examples of how camera design, in conjunction with
a CMOS image sensor, can provide additional capabilities to an end user.
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Competing factors
that define CMOS performance |
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| While CMOS technology continues to evolve, there remain several competing factors that result in trade-offs to be made. Some of these trade-offs are physical while others are due to non-idealities in the silicon or in way the device has been implemented. One of the main focuses of CMOS technology development has been
to overcome image artifacts and close attention must be paid to
the performance of a CMOS image sensor with regard to image artifacts
arising in extreme situations or certain operation and lighting
situations. |
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| 1. | Fill factor |
| Fill factor is the percentage of light-sensitive area in a pixel that directly impacts the sensitivity of a sensor and signal-to-noise ratio (SNR) of the captured image and there is an inverse relationship between the number of transistors in a given pixel and its fill factor. Having more transistors in a pixel allows additional features such as global shutter and other functionalities that enhance image quality. The trade-off, then is to choose between sensitivity and more features. | |
| 2 | Light acceptance angle |
| In order to minimize the impact of an increased number of transistors per pixel, most CMOS image sensors use micro lenses which compensate for some of the lost real estate in a pixel due to increased number of transistors. Microlenses reduce the “light acceptance angle” in a pixel which somewhat improves the trade-off between the number of transistors in a pixel and the quality of the image. | |
| 3 | Pixel change capacity and maximum exposure level |
| More transistors in a pixel results in reduced pixel charge capacity (a pixel's charge capacity is the amount of charge a pixel can hold before saturating. Saturation causes degradation of the image). In addition, a reduction in pixel size (increased resolution for the same size sensor), means less space for charge storage.This, in turn results in lower pixel charge capacity which directly impacts the suitability of sensors for some applications where, for example, the sensor needs differentiate between shades of grey in a bright image. Higher pixel storage capacities also help to minimize the size and impact of several types of imager non-idealities such as blooming. | |
| 4 | Minimum exposure time and resolution and power |
| A sensor that is not optimally designed can exhibit image artifacts at low exposure times while behaving normally at longer exposure times. In a CMOS sensor design, the minimum exposure time is determined by the signal propagation speed within the sensor. Voltage stabilization could be compromised by suboptimal signal routing schemes, an issue that becomes more evident as the sensor resolution increases. However, an ability to clock a sensor fast enough to capture a really short exposure time will also lead to larger exposure control feed through artifacts as well as higher power consumption. | |
| 5 | Minimum Achievable Noise Level |
| The minimum achievable noise level in a pixel is important in light-starved applications. Complex pixel circuitry and increased number of stages can negatively impact the noise floor of a sensor. Certain essential techniques require extra memory in the pixel architecture and this additional circuitry leaves less real estate in the pixel for light collection and signal storage which limit optical efficiency and maximum signal handling capacity. | |
| 6 | Shutter leakage |
| The downside of the technique, called "voltage domain", used by CMOS technology to eliminate unwanted signals that create image artifacts, is an increase in noise floor level. This is because the storage area for conversion and data transfer cannot be perfectly isolated from the imaging area of the pixel. Additionally, this technique impacts negatively on almost all of the above performance parameters. An alternative approach to the “voltage domain” global shutter structure is a “Charge Domain” structure, where the transfer of the image into shielded area takes place in the “Charge Domain.” and vastly reduces the complexity of the pixel but requires optimized implementation of the components within a pixel. To achieve a better trade-off scheme between global shutter and other performance parameters, CMOS fabrication process challenges must be met and overcome. Essentially, with this method, a reduced number of high quality elements in the pixel achieves the same result as a more complex pixel circuitry. | |
| There are several
competing factors at play in the CMOS imaging device design process.
Some of the trade-offs are fundamental and related to the physics
of operation of the device, while others are due to practical non-idealities
in the implementation of the design. None-the-less, an efficient CMOS
imaging device design should consider all of these factors in order
to come up with an optimal solution and future generations of CMOS
technology will certainly continue to enhance the performance of imaging
devices. For the present, users can benefit from both high resolution and high speed imaging devices that provide image quality and exceed application requirements while minimising costs. |
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Adept Turnkey Pty Ltd are "The Machine Vision and Imaging Specialists" and distributor of Machine Vision products in Australia and New Zealand. To find out more about any machine vision product please call us at Perth (08) 9242 5411 / Sydney (02) 9979 2599 / Melbourne (03) 9384 1775 or contact us online.
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